[multi-vector] Detect L1/L2 cache sizes for tile budget

[wuw92]

Why

TileBudget::default() was hardcoded to (L2 = 1.25 MB, L1d = 48 KB, from PR #863), so the tile planner mis-sized tiles on every other microarch. This detects the host's real L1d/L2 and feeds it to TileBudget.

Detection

Arch-first — CPUID where it exists, an OS API only where it doesn't:

Arch / OS	Mechanism
x86_64 (Windows, Linux, macOS)	CPUID via raw-cpuid
aarch64 Linux	sysfs
aarch64 macOS	sysctl hw.perflevel0.*, L2 ÷ cpusperl2
anything else	CacheInfo::FALLBACK (32 KB / 256 KB)

• Windows is covered by the x86_64 CPUID path — no Win32 codepath, no
  windows-sys dependency. Only Windows-on-ARM falls back.
• macOS divides the cluster L2 by cpusperl2: Apple Silicon shares one L2 per
  P-core cluster, so the raw value over-budgets L2 ~4×.

Benchmark

The multi-vector benchmark on my devbox (Windows x86_64) — detected
L1d = 32 KB, L2 = 512 KB vs the hardcoded 48 KB / 1.25 MB. ns /
inner-product, min of 50 measurements, AVX-512 jobs excluded (host is V3).
(Q, D, Dim) = (queries, docs, dim).

f32 — neutral, all shapes within ±2 %:

Q	D	Dim	Hardcoded	Detected	Δ
8	32	128	5.281	5.227	−1.0 %
16	64	256	5.137	5.176	+0.8 %
32	128	384	7.654	7.690	+0.5 %
32	16	256	5.244	5.322	+1.5 %
64	32	264	5.361	5.293	−1.3 %
32	1250	128	2.632	2.618	−0.5 %
64	1250	512	10.438	10.600	+1.6 %
64	32	128	2.539	2.537	−0.1 %
32	32	512	10.273	10.293	+0.2 %

f16 — improves on 8 of 9 shapes, the last neutral:

Q	D	Dim	Hardcoded	Detected	Δ
8	32	128	41.844	8.164	−80.5 %
16	64	256	14.863	6.523	−56.1 %
32	16	256	23.730	8.398	−64.6 %
64	32	128	7.507	3.374	−55.1 %
32	32	512	22.324	13.320	−40.3 %
64	32	264	10.166	6.611	−35.0 %
32	128	384	10.669	9.180	−14.0 %
32	1250	128	3.093	2.735	−11.6 %
64	1250	512	10.800	10.825	+0.2 %

[Copilot]

Pull request overview

This PR updates the multi-vector distance tiling planner in diskann-quantization to derive its tile budgets from runtime-detected L1d/L2 cache sizes (with per-arch fallbacks), replacing the prior hardcoded Skylake-X assumptions.

Changes:

• Added a memoized cache-size probe (L1d, L2) with x86_64 CPUID detection and aarch64 Linux/macOS OS-specific probes, plus a conservative fallback.
• Updated TileBudget::default() to use detected cache sizes when computing L1/L2-derived budgets for tile planning.
• Introduced target-specific dependencies (raw-cpuid on x86_64; libc on aarch64 macOS) to support probing.

Reviewed changes

Copilot reviewed 7 out of 8 changed files in this pull request and generated 2 comments.

Show a summary per file

File	Description
diskann-quantization/src/multi_vector/distance/mod.rs	Wires in the new cache submodule.
diskann-quantization/src/multi_vector/distance/kernels/mod.rs	Switches TileBudget::default() to runtime-detected cache sizes.
diskann-quantization/src/multi_vector/distance/cache/mod.rs	Adds memoized cache probing API and basic plausibility/memoization tests.
diskann-quantization/src/multi_vector/distance/cache/cpuid.rs	Implements x86_64 cache detection using raw-cpuid.
diskann-quantization/src/multi_vector/distance/cache/linux.rs	Implements aarch64 Linux detection via sysfs cache entries.
diskann-quantization/src/multi_vector/distance/cache/macos.rs	Implements aarch64 macOS detection via sysctl hw.perflevel0.*.
diskann-quantization/Cargo.toml	Adds target-specific dependencies for the detection paths.
Cargo.lock	Records the new dependency resolutions.

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[codecov-commenter]

Codecov Report

❌ Patch coverage is 95.91837% with 2 lines in your changes missing coverage. Please review.
✅ Project coverage is 89.41%. Comparing base (6168ef0) to head (3be0354).

Files with missing lines	Patch %	Lines
...uantization/src/multi_vector/distance/cache/mod.rs	90.47%	2 Missing ⚠️

Additional details and impacted files

@@            Coverage Diff             @@
##             main    #1134      +/-   ##
==========================================
+ Coverage   89.40%   89.41%   +0.01%     
==========================================
  Files         485      487       +2     
  Lines       92079    92126      +47     
==========================================
+ Hits        82324    82376      +52     
+ Misses       9755     9750       -5     

Flag	Coverage Δ
miri	89.41% <95.91%> (+0.01%)	⬆️
unittests	89.07% <95.91%> (+0.01%)	⬆️

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Files with missing lines	Coverage Δ
...ntization/src/multi_vector/distance/cache/cpuid.rs	100.00% <100.00%> (ø)
...ntization/src/multi_vector/distance/kernels/mod.rs	100.00% <100.00%> (ø)
...uantization/src/multi_vector/distance/cache/mod.rs	90.47% <90.47%> (ø)

... and 5 files with indirect coverage changes

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